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The cascode current source shown below utilizes two identical PMOS transistors fabricated in a 0.18 - um CMOS process for which VDD = 1.8V, Vtp = -0.5V, VA

The cascode current source shown below utilizes two identical PMOS transistors fabricated in a 0.18 - um CMOS process for which VDD = 1.8V, Vtp = -0.5V, VA

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The cascode current source shown below utilizes two identical PMOS transistors fabricated in a 0.18 - um CMOS process for which VDD = 1.8V, Vtp = -0.5V, VA

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(20 points) The cascode current source shown below utilizes two identical PMOS transistors with VDD = 1.8 V, Vtp = −0.5 V, VA′ = −6 V/μm, and μpCox = 100 μA/V2. Design the circuit to obtain I = 50 μA and Ro = 1 MΩ and to allow for the maximum possible voltage swing at the output terminal of the current source. Utilize |Vov| = 0.2 V. (a) Specify the required values of the dc bias voltages VG1 and VG2. [ 5 points] (b) What is the maximum allowable voltage at the output? [5 points] (c) Specify the values of W/L and L for Q1 and Q2. [10 points ]

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