The circuit in Figure 1 is a seif-biased current mirror/source. Assume all pMOS transistors, M1, M2, M3, and M4 are the same size, Le. (W/L)M1 = (W/L)M2 = (W/L)M3 = (W/L)M4 ha. Assume VDD = 1.8 V. Neglect the body-effect (γ = 0) and channel-length modulation effect (λ = 0) for DC bias calculations. 1. Size all the transistors for VON = 0.1 V for Iref = Iout = 25 μA. 2. Determine the value of R. 3. What is the maximum value of Vout for this circuit to work properly? 4. Determine the output resistance Rout. Assume L = 1 μm. For this part, λ is not neglected. Figure 1 Self-biased current mirror
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The circuit in Figure 1 is a seif-biased current mirror/source. Assume all pMOS transistors, M1, M2, M3, and M4 are the same size, Le. (W/L)M1 = (W/L)M2 = (W/L)M3 = (W/L)M4 ha. Assume VDD = 1.8 V. Neglect the body-effect (γ = 0) and channel-length modulation effect (λ = 0) for DC bias calculations. 1. Size all the transistors for VON = 0.1 V for Iref = Iout = 25 μA. 2. Determine the value of R. 3. What is the maximum value of Vout for this circuit to work properly? 4. Determine the output resistance Rout. Assume L = 1 μm. For this part, λ is not neglected. Figure 1 Self-biased current mirror
