The CMOS inverter shown in Figure below has VDD = 1.8 V and is fabricated in a 0.18 μm process for which μn = 4 μp, μnCox = 400 μA/V2, and Vtn = −Vtp = 0.4 V. For this problem, neglect the Early effect. Both QN and QP use the minimum channel length allowed. For QN, W/L = 1.5. Find the width that QP must have in order for the inverter switching to occur at vI = 0.9 V. [15 points] (Hint: As vI = VDD/2, QN and QP are matched)