The current IS in the subthreshold conduction Eq. (15.13) is proportional to e-Vt/nVT. If the threshold voltage of an NMOS transistor is reduced by 0.1 V, by what factor will the static power dissipation increase? Assume n = 2. Repeat for a reduction in Vt by 0.2 V. What do you conclude about the selection of a value of Vt in process design?
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