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The width of the PMOS transistor of a reference CMOS inverter is 2 and the corresponding NMOS is 1. The sum of the widths of the NMOS transistors of the logic gate shown, so that the worst-case pull-up and pull-down resistance is identical to that of a reference CMOS inverter is

The width of the PMOS transistor of a reference CMOS inverter is 2 and the corresponding NMOS is 1. The sum of the widths of the NMOS transistors of the logic gate shown, so that the worst-case pull-up and pull-down resistance is identical to that of a reference CMOS inverter is

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The width of the PMOS transistor of a reference CMOS inverter is 2 and the corresponding NMOS is 1 . The sum of the widths of the NMOS transistors of the logic gate shown, so that the worst-case pull-up and pull-down resistance is identical to that of a reference CMOS inverter is

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The width of the PMOS transistor of a reference CMOS inverter is 2 and the corresponding NMOS is 1. In order for the pull-up resistance to be equal to that of a reference CMOS inverter, the size of the PMOS transistor in this logic gate should be?
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