Unloaded CMOS Inverter. The CMOS inverter is constructed with nmos and

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Unloaded CMOS Inverter. The CMOS inverter is constructed with nmos and pmos devices with parameters of: nmos:(W/L)n = 50.18, μnCox = 200 μA/V2, VTn = 0.4 volts, λn = 0.1 V−1 and pmos:(W/L)p = 100.18, μpCox = 100 μA/V2, VTp = −0.4 volts , λn = 0.15 V−1. The suypply voltage is VDD = 1.8 V. a) Find the gate bias voltage (Vg) which results in a zero output voltage. b) Find the gate bias voltage (Vg) which results in a zero output voltage if both transistors were sized the same.

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Unloaded CMOS Inverter. The CMOS inverter is constructed with nmos and pmos devices with parameters of: $nmos : {(\frac{W}{L})}_{n} = \frac{5}{0.18}, μ_{n} C_{o x} = 200 μ A / V^{2}, V_{T_{n}} = 0.4$ volts, $λ_{n} = 0.1 V^{- 1}$ and $pmos : {(\frac{W}{L})}_{p} = \frac{10}{0.18}, μ_{p} C_{o x} = 100 μ A / V^{2}, V_{T_{p}} = - 0.4$ volts $, λ_{n} = 0.15 V^{- 1}$ . The suypply voltage is $V_{D D} = 1.8 V$ . a) Find the gate bias voltage $(V_{g})$ which results in a zero output voltage. b) Find the gate bias voltage $(V_{g})$ which results in a zero output voltage if both transistors were sized the same.