Question

Notify Me Bookmark

We wish to design the circuit shown in figure for a voltage gain of 0.8 with a power budget of 3 mW. Compute the required value of W/L. Assume C1 is very large and λ = 0. Circuit parameters μnCox = 200 μA/V2, VDD = 1.8 V, VTH = 0.4 V, RL = 60 Ω.

We wish to design the circuit shown in figure for a voltage gain of 0.8 with a power budget of 3 mW. Compute the required value of W/L. Assume C1 is very large and λ = 0. Circuit parameters μnCox = 200 μA/V2, VDD = 1.8 V, VTH = 0.4 V, RL = 60 Ω.

Image text
We wish to design the circuit shown in figure for a voltage gain of 0.8 with a power budget of 3 mW. Compute the required value of W/L. Assume C1 is very large and λ = 0. Circuit parameters μnCox = 200 μA/V2, VDD = 1.8 V, VTH = 0.4 V, RL = 60 Ω.

Detailed Answer

0 0

Please enter your email here. You will get email when this question is answered by our tutor.

Doubtrix Logo

Problem is not yet solved!

Click on Notify me to get email when question is answered.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Login Sign Up

Similar/Related Questions

We wish to design the source follower shown in the right for a voltage gain of 0.8 . If W/L = 30 /0.18 and λ = 0, determine the required gate bias voltage. Assume μnCox = 200 μA/V2 and VTH = 0.4 V(4p)
Solution
0 0

We wish to design the source follower shown in Fig. 5 for a voltage gain of 0.8 . If W/L = 30/0.18 and λ = 0. (a) Determine the required gate bias voltage. (10 pt) Fig. 5 (b) Draw Vin vs Vout graph of Fig. 5 . There is no need to specify a specific number; rough behavior alone is sufficient for scoring. (10 pt) Apply for all problems Assume μnCox = 200 μA V2, μpCox = 100 μA V2, VTH = 0.5 for NMOS and −0.5 V for PMOS, λn = λp = 0.01. ro = 1 λID
Solution
0 0

Figure 3 shows a differential amplifier circuit. The input common mode level is VCM,in = 0.9 V 'dur. Other parameters are μnCox = 100 μA/V2, λ = 0, VDD = 1.8 V, VTH = 0.4 V. W/L = 50 /0.18, RD = 1 kΩ. 10) The drive voltage in equilibrium (VGS−Vth) = 130.8 mV should be designed as such. What is the required Iss value? a) 0.475 mA b) 0.948 mA c) 0.694 mA d) 0.347 mA e) 1.388 mA 11) What is the maximum RD value that can be connected to keep the transistors in saturation? a) 2.742 kΩ b) 5.474 kΩ c) 3.746 kΩ d) 7.492 kΩ e) 1.873 kΩ 12) Determine the Vin1−Vin2 value that will ensure ID1−ID2 = Iss a) 0.316 V b) 0.158 V c) 0.223 V d) 0.261 V e) 0.185 V13) What is the maximum permissible input common mode voltage level? a) 2.027 V b) 1.962 V c) 1.726 V d) 1.506 V e) 1.853 V 14) Calculate the voltage gain of the differential amplifier. a) 10.68 b) 2.67 c) 3.63 d) 7.29 e) 5.13
Solution
0 0