What is the fall time for a minimum size CMOS inverter in which both W

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What is the fall time for a minimum size CMOS inverter in which both W/L ratios are 2/1, assume a load capacitance of 0,8 pF and VDD = 2,5 V, (VTN = |VTP| = 0.6 V, Kn' = 100 μA/V2, kp′ = 40 μA/V2)? a. 3,16 ns b. 7,58 ns c. 3.79 ns d 2.25 ns e 4.75 ns

What is the fall time for a minimum size CMOS inverter in which both W/L ratios are 2/1, assume a load capacitance of 0,8 pF and VDD = 2,5 V, (VTN = |VTP| = 0.6 V, Kn' = 100 μA/V2, kp′ = 40 μA/V2)? a. 3,16 ns b. 7,58 ns c. 3.79 ns d 2.25 ns e 4.75 ns

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What is the fall time for a minimum size CMOS inverter in which both W/L ratios are

2 / 1

, assume a load capacitance of

0, 8 p F

and

V_{D D} = 2, 5 V, (V_{T N} = V_{T P} ∣= 0.6 V, K_{n} = 100 m M

,

k_{p}^{'} = 40 μ A N^{2}) ?

a.

3, 16 n s

b.

7, 58 n s

c. 3.79 ns d 2.25 ns e 475 ns

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