Question

Notify Me Bookmark

Find the area of the triangle with the given vertices. (Hint: 12 ∥u×v∥ is the area of the triangle having u and v as adjacent sides.) A(0, 0, 0), B(4, 0, 6), C(−6, 3, 0)

Find the area of the triangle with the given vertices. (Hint: 12 ∥u×v∥ is the area of the triangle having u and v as adjacent sides.) A(0, 0, 0), B(4, 0, 6), C(−6, 3, 0)

Image text
Find the area of the triangle with the given vertices. (Hint: 1 2 ∥ u × v ∥ is the area of the triangle having u and v as adjacent sides.)
A ( 0 , 0 , 0 ) , B ( 4 , 0 , 6 ) , C ( − 6 , 3 , 0 )

Detailed Answer

2 0

Please enter your email here. You will get email when this question is answered by our tutor.

Answer
Doubtrix Logo

This Problem has been solved!

You'll get a detailed, step-by-step and expert verified solution.

Join Doubtrix with 7-days free trial

  • Icon Correct & Verified Answers
  • Icon No AI-Generated Answers
  • Icon Video Solution for Difficult Questions
  • Icon Work With Experts to Reach at Correct Answers
Login Sign Up
  • Student Reviews:
  • (2)
  • Correct answers (2)
  • Complete solution (2)
  • Step-by-step solution (2)
  • Fully explained (2)

Similar/Related Questions

Find the volume of the solid generated by revolving the region enclosed by the triangle with vertices (1,0), (2,1), and (1,1) about the y-axis. Use the washer method to set up the integral that gives the volume of the solid. V = dy (Type exact answers, using π as needed.) The volume of the solid generated by revolving the region enclosed by the triangle with vertices (1,0), (2,1), and (1,1) about the y-axis is cubic units. (Type an exact answer, using π as needed.)
Solution
0 0

The region with vertices (4, 6), (10, 0), (22, 12), and (16, 18) is revolved about the x-axis to generate a solid. Find the volume of the solid. Enter answer using exact value.
Solution
0 0

You are asked to design an NMOS inverter with a resistive load, as shown in Figure 2.e, with the input voltage of either 0 V (logic level 0) or 3.3 V (logic level 1). The transistor is an n-channel enhancement type MOSFET with a threshold voltage of VT = 1.5 V, an aspect ratio (W/L) of 20 , and a gate capacitor per unit area of 400 nF/cm2. The electron mobility is 500 cm2 /Vs. When the input is at logic level 1 (vi = 3.3 V), the transistor is in the linear region. Find the values of VDD and RD to have the output voltage of 0.3 V at logic level 0 and 3.3 V at logic level 1. Figure 2. e.
Solution
0 0